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Design For Test Engineer – AI Silicon Design


Minimum Qualifications

  • BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of industry experience in advanced DFx techniques.
  • DFx experience implementing in finFET technologies.
  • Experience with industry standard ATPG and DFx insertion CAD tools.
  • Familiarity with System Verilog and UVM.