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05/5/21

Digital Design Verification Engineer

Tenstorrent

Minimum Qualifications

  • Bachelor/Master in Electrical/Computer Engineering/Engineering Science
  • Expert in hardware verification languages (SystemVerilog, SystemC)
  • Experience with UVM and coverage driven constrained random verification
  • Experience with Low power verification techniques
  • Excellent programming skills. C/C++ as well as scripting languages (Perl, tcl)

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