TT-Ascalon™

Tenstorrent's RISC-V-based TT-Ascalon™ architecture has been developed with flexibility in mind, scalable from a high-performance, highly-performant 8-wide implementation down to a compact and efficient 2-wide implementation, with multiple steps in between. The Tensix Cores that power our AI accelerators are equally scalable, designed to form a mesh that scales with as many cores as are needed.
TT-Ascalon™
TT-Ascalon™ Performance Table
Watch & Learn Our Views on RISC-V