risc-v

Tenstorrent and AutoCore are combining AutoCore’s production-proven automotive software platform with Tenstorrent’s best-in-class TT-Ascalon™ RISC-V cores to offer a scalable, open-standard architecture.

Ascalon delivers a complete solution to customers seeking to own and customize their IP.

Inside Tenstorrent’s TT-Blueprint Event

Tenstorrent releases RiescueC, a specialized test generator for RISC-V compliance testing

Tenstorrent releases RiescueD, a powerful framework for writing direct tests in RISC-V assembly.

Tenstorrent is pleased to announce that it closed a $100M strategic financing up-round led by Hyundai Motor Group and Samsung Catalyst Fund

'Lone wolf’ is the popular image for renowned computer architects. But Keller is no loner, having gone from hands-on engineer to CEO at AI chip startup Tenstorrent.

Tenstorrent and LG Electronics Inc. (LG) are pleased to announce they are collaborating to build a new generation of RISC-V, AI and Video Codec Chiplets to potentially power LG’s premium TV and automotive products of the future and Tenstorrent’s data center products.

CEO Jim Keller sat down with Ian Cutress to talk about the future of AI hardware.

Our Chief CPU Architect Wei-han Lien introduces Ascalon at the RISC-V International Summit.

Tenstorrent President and CTO Jim Keller talked about designing for the future at TSMC's 2022 Open Innovation Platform Ecosystem Forum.

Tenstorrent is excited to announce a foundational component for the architectural verification of any RISCV based design.